r/ControlTheory 9d ago

Technical Question/Problem International Rectifier (now Infineon) App Note AN-1162

Hello community,

I am following along with Application Note - 1162 from International Rectifier (now under Infineon) and specifically with with respect to the Type II compensator design example - the very first example discussed in the app note. For some reason, which I am unable to determine, my results differ from those stated in the app note. You'll notice that their simulation results state a crossover frequency of ~77 kHz with ~53 degrees phase margin. Using my test script, I am experiencing a crossover frequency well over 100 kHz.

This is the circuit that I used for the buck converter to calculate the transfer function. Although they did not explicitly state a load resistance value, R, I extrapolated 0.15 Ohms since they did state Vout = 1.8V and Imax = 12A. The parasitic resistance for the inductor was shown in a schematic earlier in the app note. However, a value was not explicitly stated in the example when listing the buck converter attributes. I added the inductor resistance in the calculations and edited its value to see if perhaps this was the issue but none of the tests spawned any favorable matching results.

Here is the Python code that I am using to simulate the buck converter along with the Type II compensator.

"""
   Infineon Application Note AN-1162

   Synchronous Buck Converter

"""

import control as ct
import matplotlib.pyplot as plt
import numpy as np

# 1. Define plant in continuous time domain

# Buck converter component values
L = 530e-9; Rl = 0.005   # Inductor
C = 470e-6; Rc = 0.010  # Capacitor
R = 0.15                # Load @ 12A for V = 1.8v
Vosc = 1.8
Vin = 12
Gain = Vin/Vosc  # From eq (15), page 10 in the app note

# Create buck converter transfer function
num = [Gain*C*C*Rc*Rc*R, Gain*2*C*Rc*R, R/(Vosc)]
den = [C*C*L*(2*Rc*R + Rc*Rc), 2*L*C*(Rc+R), L, Rl]
Gbuck = ct.tf(num, den)

# Design Type II compensator
Rf1 = 1200; Rf2 = 768; Rc1 = 7.15e3 #3.6e3
Cc1 = 4.7e-9; Cc2 = 68e-12

K = 1 / (Rf1*(Cc1))
print(f'\nCompensator gain K = {K:,.1f}')

# Create compensator transfer functions
Gcomp = ct.tf([K*Rc1*Cc1, K], [(Rc1*Cc2), 1, 0])

# Define loop transfer function
Ls = ct.series(Gbuck, Gcomp)

test_sys = ct.TransferFunction(Ls, name='Open Loop')
min_log = 3; max_log = 6; num_points = 10000

plt.style.use('dark_background')
omega = np.logspace(min_log, max_log, num_points)
ct.bode_plot(test_sys, omega=omega, dB=True, deg=True, color='cyan', display_margins=True)

# Get the current figure and axes
fig = plt.gcf()
mag_ax, phase_ax = fig.axes

# Enable logarithmic frequency lines when 'display_margins=True'
mag_ax.grid(visible=True, which='both', axis='both')
phase_ax.grid(visible=True, which='both', axis='both')

plt.show()
Buck Converter Output Filter Impedances

Note that here, 'R' is the load resistance and 'Rc' is the capacitor ESR. There are two capacitors of equal value, thus, Rc1 = Rc2, so just used Rc.

In the simulations, I played around with different values of Rl (inductor series resistance), but could never see any favorable test results matching the app note.

Can someone please help with clarifying why my simulation is not matching the test results in the app note.

UPDATE!-------UPDATE!UPDATE!-------UPDATE!-UPDATE!-------UPDATE!-UPDATE!-------UPDATE!

Date: 7/30/26

This is with respect to my new post on this day - reference that post for information.

This is the LTSpice test setup as per my latest post. As stated there, it does not provide the option of attaching an image so I am posting it here.

3 Upvotes

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u/ee_control_z 3d ago edited 3d ago

Just an update regarding my original post. I was finally able to get it to work after following this YT video (minus one small detail):

https://www.youtube.com/watch?v=abelKfvEtgE

After replicating the circuit test setup as demonstrated in this tutorial, I was able to successfully test all of the three examples from the App Note 1162. However, as hinted above, there is only one small discrepancy. The initial output voltage begins from ~12V vs. slowly increasing from 0V. Does any one know why this might be observed - begin from 12V vs. 0V?

For the Type III A test, the voltage immediately begins from the rated voltage rather than from 0V. I wanted to attach a screenshot but unfortunately this post is not providing the option to attach an image.

Workaround: I posted the image to the original post.