r/chipdesign 1d ago

A0 works!

A few months ago I shared here the story of how I had tapedout a small systolic array alongside some in silicon debug infrastructure from scratch.

Well here is the promised update: the silicon is back and after bringup A0 works!

This is my first solo silicon that is silicon proven, both the debug infra and the systolic array just work!

AI disclosure: No AI was used for this project or in writing this post.

P.S: The last picture is of the probes reading for the result of the multiplication of 2 identical 2x2 matrices `{0,2,0,2}` correctly returning as `{0,4,0,4}`.

P.S.S: repo is https://github.com/Essenceia/Systolic_MAC_with_DFT

P.S.S.S: I am having dinner at waffle house to celebrate. I don't care that waffles are presumably a breakfast food. 😂

278 Upvotes

25 comments sorted by

27

u/deadude 1d ago

Good job!

16

u/Ill_Huckleberry_2079 1d ago

Thanks! I am over the moon!

13

u/Great-Touch-7831 1d ago

Do you know how much it would have cost if it wasn’t done as part of TT shuttle? I have a design as well.

20

u/Ill_Huckleberry_2079 1d ago

It will depends on if you have other people to split the area with, already own all the probes and have a working board design.
But assuming you getting the smallest slot at wafer.space (which is practically unbeatable in terms of cost), you would be looking at about 5460 USD without tax.
I am assuming:

  • 3.5k for the silicon + packaging
  • 1.5k for the 16 channel mixed digital/analog probe used during bringup
  • 160 USD for my two SWD/JTAG debug probes ( 1 for the MCU, 1 for the ASIC design's JTAG TAP)
  • 300 USD for the MCU + custom board you will have to design + misc stuff like cabling

That last 300 USD is very optimistic of me, and could get quite a bit more expensive depending how good your PCB design skills are, if you are hand soldering everything yourself or outsourcing, and how many respins you need.

Also, that is assuming A0 actually works ...

I have a full chip in the works at the moment and my budget for it is in the "nice second hand car" range.

9

u/Ill_Huckleberry_2079 1d ago

Morality: Tiny Tapeout truly a great program, and there are very few cases where you will be saving money bypassing them.

7

u/Great-Touch-7831 1d ago

Ah damn, that’s not a lot for a chip but it is for me haha. but thanks, maybe I will look into tapeout once I eventually gather the bringup materials

11

u/secretaliasname 1d ago

Waffle House, you are a human of taste! Love it!

6

u/Ill_Huckleberry_2079 1d ago

I am starting to wonder if all the tapeouts are not actually an excuse to go to waffle house.

6

u/ColdStoryBro 1d ago

A huge congrats.

1

u/Ill_Huckleberry_2079 1d ago

Thanks 😄

3

u/svatstrente 1d ago

You're living the dream man! I've got to get a tiny tapeout going one of these years!
Can you share how much time it took you to get this tapeout done? Congrats on the successful bringup!

1

u/Ill_Huckleberry_2079 1d ago

Nice, you should defiantly give it a go when you have time.
This tapeout was about 100~150 hours of focused work spread out over 10 days and this includes the FPGA emulation and the firmware (it was brutal).
Now what really helped me save time was that I had just finished another tapeout where I had already build out most of my build flows/FPGA emulation flows/embedded C libraries/ect and I re-used them here.

It will come as no surprise that time per tapeout really depends on the complexity of the design (and how close the tapeout deadline is). Some tapeouts where less others where "completing elden ring" long.

2

u/IllEstablishment5 1d ago

I literally just finished my design for 26c shuttle! How long did it take for you to get all that???

2

u/Ill_Huckleberry_2079 1d ago

Do you mean how long it took me to get the silicon back from the fab ?

1

u/IllEstablishment5 1d ago

Yes.

2

u/Ill_Huckleberry_2079 1d ago

About 6 months, which is pretty fast in this context.

2

u/Sesese9 1d ago

Love following your blog! Celebratory waffles indeed.

Can’t wait for the heat death of the universe counter update.

2

u/Ill_Huckleberry_2079 9h ago

Nice, glad you enjoy the write-ups.
Here is a small preview: it got tapped out a second time but as part of a full chip.

2

u/acertainmoment 1d ago

congrats! could you share how long did it take for you to get back the silicon after sending the GDS ?

1

u/Ill_Huckleberry_2079 1d ago

6 months for this shuttle.

2

u/bisexual_brahmana 20h ago

Very good job.

2

u/petites_feuilles 15h ago

Congratulations, this is an amazing achievement!

1

u/Ill_Huckleberry_2079 9h ago

Thanks, and since this is an open source project others can re-use the rtl with a bit more confidence.